This invention relates in general to computer systems, and in particular to a self-adaptive computer memory address allocation system for detecting the presence or memory circuits in a computer system and remapping memory addresses in response thereto.
Computer systems are typically comprised of one or more memory modules comprised of a plurality of memory banks to which memory circuits, such as dynamic random access memory chips (DRAMs), are connected. A main controller (e.g. a CPU) typically generates address signals for accessing predetermined memory locations of the memory circuits. For example, an address signal is usually received by the memory modules and decoded therein, such that a predetermined one of the memory banks is enabled and a predetermined DRAM memory location defined by the address signal, is accessed.
In a straightforward computer system having a fixed (non-expandable) amount of memory, there is typically a one-to-one correspondence (mapping) between the generated address signals and the DRAM memory locations.
It is desirable that the number of memory banks be expandable, thereby accommodating a greater number of memory circuits, in order to implement software revisions, or store large amounts of data, etc. In order to effect memory expansion in the past, costly redesign and rewiring of memory module address decoding circuitry was typically required.
One prior art memory management system sought to overcome the disadvantages of costly redesign and rewiring by utilizing a plurality of hardware address multiplexers and an operating system program which included a subroutine for remapping address signals during execution of an application program. The remapping process was said to be "on-line". The remapped address signals were then used for accessing the actual DRAM memory locations. The aforementioned remapping subroutine and additional hardware was complex, and execution of the subroutine was found to be time consuming. Typically, one or more main controller wait states were required to implement the address remapping since a multiplicity of bank switching access instructions were inserted in the program code, thereby substantially reducing speed of execution of the application program as well as increasing the likelihood of memory access errors.
The remapping subroutine was dedicated, or non self-adaptive, since further memory expansion (or reduction) required modification of various parameters of the program which in turn, usually required replacement of a floppy disk or ROM on which the operating system program was stored